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dc.date |
2018-09-01 |
|
dc.date.accessioned |
2018-06-21T16:28:49Z |
|
dc.date.available |
2018-06-21T16:28:49Z |
|
dc.identifier |
IAX0043 |
en_US |
dc.identifier.uri |
https://dspace.ttu.ee/xmlui/handle/123456789/17 |
|
dc.description |
Processor: fetch-decode-execute cycle, processor structure, different architectures. Processor components: Combinational circuits and sequential circuits;
Computer memory: classification, hierarchy, memory technologies, memory organization;
Instruction set and addressing: instructon formats, instruction set, addressing modes, virtual memory;
Microcomputer hardware: architecture, buses, data transfer, microprocessor supporting components, computer performance increasing;
Input/output devices: keyboard, printers, monitors, touch screens, mouse, AD and DA converters.
Special hardware: realization, application area;
Computers and reliability: failures of system, hardware testing, error-detecting codes. |
en_US |
dc.language.iso |
other |
en_US |
dc.publisher |
Department of Computer Systems |
en_US |
dc.rights |
Tallinn University of Technology |
en_US |
dc.subject |
Hardware |
en_US |
dc.title |
Computers |
en_US |
dc.type |
Talk/Lecture |
en_US |
compass.learningOpportunitySpecification.assessment |
Hands-on exercises and written exam |
en_US |
compass.learningOpportunitySpecification.level |
EQF Level 6::Bachelor |
en_US |
compass.learningOpportunitySpecification.objective |
CE-CAO Computer Architecture and Organization |
en_US |
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